SIRF GPS
上传用户:zhuanjifen
上传日期:2013-09-22
文件类型:PDF
文件大小:672.11K
资料积分:0分 积分不够怎么办?
GSC3eLPx and GSC3fLPx Data sheetDatasheet
SiRFstarIII Architecture
GSC3e/LPx and GSC3f/LPx
PRODUCT DESCRIPTION
High Performance, Lowest Power, GPS Single Chip
GSW3―Modular Software Support
X X
The GSC3e/LPx and GSC3f/LPx are the pin-for-pin compatible, lowest power versions of the advanced GSC3e(f)/LP receiver in a single package. The baseband has been ported to 65 nm technology, enabling an additional power reduction of up to 30 percent. In the GSC3e/LPx, the baseband and RF are integrated into the 7 mm x 10 mm x 1.4 mm package. In the GSC3f/LPx, flash memory is included in the package making for an extremely compact design. The GSC3e(f)/LPx includes a powerful GPS DSP integrated with an ARM7TDMI microprocessor and 1 Mb of SRAM. The GSC3e(f)/LPx architecture uses an FFT and Matched Filter that delivers performance eq
SiRFstarIII Architecture
GSC3e/LPx and GSC3f/LPx
PRODUCT DESCRIPTION
High Performance, Lowest Power, GPS Single Chip
GSW3―Modular Software Support
X X
The GSC3e/LPx and GSC3f/LPx are the pin-for-pin compatible, lowest power versions of the advanced GSC3e(f)/LP receiver in a single package. The baseband has been ported to 65 nm technology, enabling an additional power reduction of up to 30 percent. In the GSC3e/LPx, the baseband and RF are integrated into the 7 mm x 10 mm x 1.4 mm package. In the GSC3f/LPx, flash memory is included in the package making for an extremely compact design. The GSC3e(f)/LPx includes a powerful GPS DSP integrated with an ARM7TDMI microprocessor and 1 Mb of SRAM. The GSC3e(f)/LPx architecture uses an FFT and Matched Filter that delivers performance eq
关键词: GSC3eLPx GSC3fLPx sheet

加入微信
获取电子行业最新资讯
搜索微信公众号:EEPW
或用微信扫描左侧二维码